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The problem of implementing modular multipliers in Application-Specific Integrated Circuits (ASIC) and FPGA is relevant in cases where the synthesizers do not support modular operations, for example in VHDL these are mod (module), rem (residue modulo calculation), and quotient calculation operations. In this work, the results of experiments on the circuit implementation of 2-, 3- and 4-operand modular multipliers in the design library of ASIC and FPGA are presented. The initial descriptions of modular multiplier designs were given by systems of incompletely specified (partial) k-valued and Boolean functions. The preliminary technology-independent optimization was aimed at minimizing algebraic multi-level representations of functions in the class of multi-valued (MDD) and binary (BDD) decision diagrams. The synthesized circuits were evaluated by area and time delay. It has been established that the use of partial function models makes it possible to improve the areas and time delays of ASIC and FPGA for small module values. From the experiments, it can be observed that when synthesizing modular multiplier circuits as part of FPGA and using the Vivado design system (AMD, Xilinx), it is advisable to compare the circuit solutions obtained from functional descriptions of modular multipliers with the solutions obtained by Vivado from the synthesized VHDL mod operation and select the best solutions.

Key words: modular multiplier, Boolean functions system, Shannon expansion, Binary Decision Diagram, Multi-Valued Decision Diagram, digital logic synthesis, VHDL, ASIC, FPGA
Published in: CIRCUIT ENGINEERING AND DESIGN
Bibliography link: Bibilo P. N., Romanov V. I. The use of multi-valued and binary decision diagrams in the synthesis of modular multipliers. Izv. vuzov. Elektronika = Proc. Univ. Electronics. 2026;31(2):168–187. (In Russ.). https://doi.org/10.24151/1561-5405-2026-31-2-168-187.

Peter N. Bibilo
The United Institute of Informatics Problems, National Academy of Sciences of Belarus, Belarus, 220012, Minsk, Surganov st., 6

Vladimir I. Romanov
The United Institute of Informatics Problems, National Academy of Sciences of Belarus, Belarus, 220012, Minsk, Surganov st., 6

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UDK: 004.315
Publication type: Scientific article
Source lang: Russian
DOI: 10.24151/1561-5405-2026-31-2-168-187
RISC id: SOAHXQ

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